The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2026

Filed:

May. 13, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Vishal Narayanan, Bengaluru, IN;

Anil Baby, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/16 (2006.01); G06F 1/3206 (2019.01);
U.S. Cl.
CPC ...
G06F 1/1632 (2013.01); G06F 1/3206 (2013.01);
Abstract

A first printed circuit board (PCB) comprises a first hardware interface, compatible with an interface standard, to couple the first PCB to a first socket of a second PCB, which further comprises a second socket, and first and second busses respectively coupled to the first and second sockets. The first PCB comprises a second hardware interface to communicate a first signal, to indicate a total current drawn by multiple PCBs, and a second signal each with a third PCB while the third PCB is coupled to the second PCB at the second socket. The first PCB comprises circuitry to impose a limit on power consumption by the first PCB, circuitry to generate, with the third PCB, the first signal, and circuitry to generate a second signal, which is to provide, for each of the multiple PCBs, an indication of whether respective circuitry of the PCB is to be throttled.


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