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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12563930 B1

PDFFull Text
Date of Patent:
Feb. 24, 2026

Filed:

Mar. 25, 2020

Display substrate and display device being capable of reducing the load of signal lines

Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Lulu Yang, Beijing, CN;

Tinghua Shang, Beijing, CN;

Yi Qu, Beijing, CN;

Xin Zhang, Beijing, CN;

Huijun Li, Beijing, CN;

Xiaofeng Jiang, Beijing, CN;

Mengqi Wang, Beijing, CN;

Meng Zhang, Beijing, CN;

Siyu Wang, Beijing, CN;

Assignees:

CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan, CN;

BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;

Attorney:

LEASON ELLIS LLP

Primary Examiner:

Sue A Purvis

Assistant Examiner:

Seyon Ali-Simah undefined Punchbeddell

Int. Cl.
CPC ...
H10K 59/131 (2023.01); H10K 59/122 (2023.01); H10K 59/12 (2023.01); H10K 71/00 (2023.01);
U.S. Cl.
CPC ...
H10K 59/1315 (2023.02); H10K 59/122 (2023.02); H10K 59/131 (2023.02); H10K 59/1201 (2023.02); H10K 71/00 (2023.02);
Abstract

Disclosed are a display substrate and a display device. The display substrate includes: a base substrate, a first gate layer, a second gate layer and a first conductive layer. The first gate layer includes a reset signal line extending in a first direction, and a first electrode block; the second gate layer includes a second electrode block, wherein the second electrode block is configured to form a storage capacitor with the first electrode block; and the first conductive layer includes a power line extending in a second direction, wherein the reset signal line and the power line have a first overlapped region, and the second electrode block and the power line have a second overlapped region. The width of the power line located in the first overlapped region is smaller than the width of the power line located in the second overlapped region.

Find Patent Forward Citations

Yang, Lulu. (2026). Display substrate and display device being capable of reducing the load of signal lines (U.S. Patent No. 12563930). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12563930

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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