The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2026
Filed:
Jun. 30, 2022
Texas Instruments Incorporated, Dallas, TX (US);
Kuo Yao Lin, Garland, TX (US);
Akram Salman, Plano, TX (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
The present disclosure generally relates to an electrostatic discharge (ESD) protection circuit in an integrated circuit and methods of forming such. In an example, an integrated circuit includes a transistor, a doped buried layer, and a capacitor. The transistor includes source and drain regions and a gate structure. The source and drain regions have a first conductivity type and are disposed in a semiconductor layer. The semiconductor layer has an opposite second conductivity type. The doped buried layer has the first conductivity type disposed in the semiconductor layer below the source and drain regions. The capacitor is disposed in the semiconductor layer and includes first and second capacitor electrodes extending to the doped buried layer. The first capacitor electrode electrically couples the drain region. The second capacitor electrode electrically couples the gate structure and conductively contacts the doped buried layer. The doped buried layer electrically couples the source region.