The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Jun. 30, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Martin Clara, Santa Clara, CA (US);

Giacomo Cascio, Villach, AT;

Erfan Ghaderi, Hillsboro, OR (US);

Marc Jan Georges Tiebout, Finkenstein, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/24 (2006.01); H03H 7/25 (2006.01); H04B 1/40 (2015.01);
U.S. Cl.
CPC ...
H03H 11/245 (2013.01); H04B 1/40 (2013.01);
Abstract

A digital step attenuator for automatic gain control in a transceiver front-end. The digital step attenuator includes a series path coupled between an input port and an output port, a plurality of series shunt switches coupled in parallel to the series path, and a plurality of parallel paths coupled to the series path in parallel. The series path includes a plurality of series resistors coupled in series. Each series shunt switch is for by-passing a different set of one or more series resistors. Each parallel path includes a parallel resistor and a parallel shunt switch, and each parallel path is coupled to either the input port, the output port, or an internal node between two adjacent series resistors, in parallel. A plurality of different π-attenuators with a different topology are formed by selectively controlling the series shunt switches and the parallel shunt switches.


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