The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2026
Filed:
Dec. 05, 2023
Synopsys, Inc., Sunnyvale, CA (US);
Ankit Singh, Noida, IN;
Shubham Upadhyay, Noida, IN;
Jaspreet Singh, Noida, IN;
Vivek Kumar Dikshit, Noida, IN;
Ravindra Shrivastava, Noida, IN;
Anurag Garg, Cupertino, CA (US);
Synopsys, Inc., Sunnyvale, CA (US);
Abstract
A circuit includes a first PMOS having a source coupled to a supply voltage and a gate coupled to a first bitline of a first memory cell; a second PMOS having a source coupled to the supply voltage and a gate coupled to a second bitline of a second memory cell; a first NMOS having a drain coupled to drains of the first and second PMOS transistors and a gate coupled to the first bitline; a second NMOS having a drain coupled to a source of the first NMOS and a gate coupled to the second bitline; a third PMOS precharging the first bitline to the supply voltage in response to a first precharge signal; and a fourth PMOS precharging the second bitline to the supply voltage in response to a second precharge signal. In response to the first and second precharge signals, the ground terminal is caused to float.