Methods used in forming a memory array comprising strings of memory cells including selectively etching sacrificial material in a memory-cell region selectively relative to insulating, insulator and/or insulative material(s) to form void spaces between conductive tiers

Abstract

A memory array comprising strings of memory cells comprises a vertical stack comprising vertically-alternating insulative tiers and conductive tiers directly above a conductor tier. Channel-material-string constructions of memory-cell strings extend through the insulative and conductive tiers. The channel material of the channel-material-string constructions directly electrically couples with conductor material of the conductor tier. The vertical stack comprising a memory-cell region comprises memory cells. Individual of the insulative tiers in the memory-cell region laterally-outward of the channel-material-string constructions have at least a majority of their insulative matter being void space. The vertical stack comprises an upper region directly above the memory-cell region. The upper region comprises at least two of the conductive tiers and that comprise upper select gates. Individual of the insulative tiers in the upper region laterally-outward of the channel-material-string constructions have at least a majority of their insulative matter being solid. Other embodiments, including method, are disclosed.