The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2026

Filed:

Mar. 04, 2024
Applicant:

Silicon Storage Technology, Inc., San Jose, CA (US);

Inventors:

Viktor Markov, Santa Clara, CA (US);

Jong-Won Yoo, Morgan Hill, CA (US);

Alexander Kotov, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01);
Abstract

A method of programming a memory device comprising control gate lines, erase gate lines, select gate lines, source lines and bit lines connected to rows and columns of memory cells, the method comprising performing an erase operation that includes applying a first voltage to one of the erase gate lines, performing a pre-program operation that includes electrically connecting the one of the erase gate lines to a pair of the control gate lines to use positive charge on the one of the erase gate lines from the erase operation to pre-charge the pair of the control gate lines, and performing a program operation that includes applying a second voltage to the one of the erase gate lines and the pair of the control gate lines.


Find Patent Forward Citations

Quick Actions:

Markov, Viktor. (2026). Accelerated programming of four gate, split-gate flash memory cells (U.S. Patent No. 12554423). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12554423

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