The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2026
Filed:
Dec. 22, 2023
Xilinx, Inc., San Jose, CA (US);
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Juan J. Noguera Serra, San Jose, CA (US);
Akila Subramaniam, Austin, TX (US);
David Kramer, Austin, TX (US);
Madhusudan Chilakam, Boxborough, MA (US);
Tim Tuan, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Abstract
Embodiments herein describe a hardware accelerator that includes multiple power or clock domains. For example, the hardware accelerator can include an array of data processing engines (DPEs) where different subsets of the DPEs (e.g., different columns, rows, or blocks) are disposed in different power or clock domains within the hardware accelerator. When one or more subsets of the DPEs are idle (e.g., the hardware accelerator has not assigned any tasks to those DPEs), the accelerator can deactivate the corresponding power or clock domain (or domains), which deactivates the DPEs in those domains while the DPEs in the other power or clock domains remain operational. As such, idle DPEs can be deactivated to conserve energy while DPEs with work can remain operational.