The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Dec. 22, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Chew Yeek Lau, Muar, MY;

Swee Kah Lee, Melaka, MY;

Fong Mei Lum, Melaka, MY;

Kon Hoe Chin, Pusing, MY;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4828 (2013.01); H01L 21/4846 (2013.01); H01L 21/56 (2013.01); H01L 23/3107 (2013.01); H01L 23/49579 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/81 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13109 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/16503 (2013.01); H01L 2224/19 (2013.01); H01L 2224/214 (2013.01); H01L 2224/81132 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/8181 (2013.01);
Abstract

A method of forming one or more semiconductor packages includes mounting one or more semiconductor dies on the metal strip such that the one or more semiconductor dies are in a flip chip arrangement whereby terminals of the one or more semiconductor dies face the upper surface of the metal strip, forming an electrically insulating encapsulant material on the upper surface of the metal strip that encapsulates the one or more semiconductor dies, and forming package terminals that are electrically connected with the terminals of the one or more semiconductor dies, wherein the package terminals are formed from the metal strip or from metal that is deposited after removing the metal strip.


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