The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

May. 25, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yu-Wei Lu, Hsinchu, TW;

Kenichi Sano, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/306 (2006.01); H10D 30/01 (2025.01); H10D 30/63 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 62/40 (2025.01); H10D 64/01 (2025.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30604 (2013.01); H01L 21/30608 (2013.01); H10D 30/019 (2025.01); H10D 30/0195 (2025.01); H10D 30/025 (2025.01); H10D 30/026 (2025.01); H10D 30/63 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 62/40 (2025.01); H10D 62/405 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01); H01L 23/544 (2013.01); H01L 2223/54493 (2013.01);
Abstract

A method for manufacturing a semiconductor structure includes forming a plurality of semiconductor stack portions spaced apart from each other by a plurality of recesses, each of which includes two sacrificial layer portions and a channel layer portion disposed therebetween, in which the channel layer portion has a plurality of crystal planes and is formed with a first straight lateral surface which is aligned with one of the crystal planes that has a lowest etching rate for an etchant to be used for laterally etching the channel layer portion among those of the crystal planes of the channel layer portion which are able to expose to the recesses; and laterally etching the channel layer portion using the etchant to permit the channel layer portion to be formed with a second straight lateral surface.


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