The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Jan. 25, 2024
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Anirudha Shelke, Maharashtra, IN;

Ashwin S. M., Kerala, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/10 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G11C 7/1087 (2013.01); G11C 29/52 (2013.01);
Abstract

An integrated circuit component comprises a signal input to receive, via an external signal link, a data strobe signal comprising a sequence of data-timing pulses preceded by a data preamble interval and succeeded by a data postamble interval, and a sequence of parity-timing pulses preceded by a parity preamble interval and succeeded by a parity postamble interval. The integrated circuit component further comprises a bypass circuit to generate a bypass signal from the data strobe signal and a strobe gating circuit coupled to the signal input and the bypass circuit and configured to generate an adaptive gating signal based on an internal gating signal, and the bypass signal, and to apply the adaptive gating signal to the data strobe signal to generate a gated strobe signal having at least one of the sequence of data-timing pulses or the sequence of the parity-timing pulses gated out from the data strobe signal.


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