The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2026

Filed:

Dec. 13, 2023
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Bahar Youssefi, Richmond Hill, CA;

Xiaobin Yuan, Cary, NC (US);

David M. Burnell, Ellicott City, MD (US);

Dimitros Loizos, Sunnyvale, CA (US);

Stephanie Leclerc, Anjou, CA;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 89/60 (2025.01);
U.S. Cl.
CPC ...
H10D 89/611 (2025.01); H10D 89/921 (2025.01);
Abstract

Embodiments included herein are directed towards an electrostatic discharge ('ESD') protection circuit and methods of using the same. The circuit may include a power supply and a power clamp operatively connected with the power supply. The circuit may further include a field effect transistor (“FET”) operatively connected with the power clamp and at least one diode operatively connected with the field effect transistor. The circuit may further include an auxiliary power clamp operatively connected with the field effect transistor.


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