The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Dec. 16, 2022
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Jay Paul John, Chandler, AZ (US);

James Albert Kirchgessner, Tempe, AZ (US);

Johannes Josephus Theodorus Marinus Donkers, Valkenswaard, NL;

Ljubo Radic, Gilbert, AZ (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 10/80 (2025.01); H10D 10/01 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 62/17 (2025.01); H10D 62/40 (2025.01); H10D 62/832 (2025.01);
U.S. Cl.
CPC ...
H10D 10/821 (2025.01); H10D 10/021 (2025.01); H10D 62/115 (2025.01); H10D 62/133 (2025.01); H10D 62/138 (2025.01); H10D 62/177 (2025.01); H10D 62/40 (2025.01); H10D 62/832 (2025.01);
Abstract

A semiconductor device includes a semiconductor substrate, a collector region having a first width formed within the semiconductor substrate and an intrinsic base region having a second width, disposed over the collector region, wherein the first width is greater than the second width. An extrinsic base region having an upper surface is formed over the collector region and electrically coupled to the intrinsic base region, wherein the extrinsic base region includes a monocrystalline region coupled to the intrinsic base region and a polycrystalline region coupled to the monocrystalline region. An emitter region is formed over the base region.


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