The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Jun. 28, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Tamir Salus, Zichron Yaakov, IL;

Shunjiang Xu, Milpitas, CA (US);

Christopher Schaef, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/18 (2006.01); G06F 1/26 (2006.01); H02M 1/00 (2006.01); H02M 1/088 (2006.01); H02M 3/155 (2006.01);
U.S. Cl.
CPC ...
H02M 1/0043 (2021.05); H02M 1/0012 (2021.05); H02M 1/088 (2013.01); H02M 3/155 (2013.01);
Abstract

Techniques and mechanisms for facilitating a scalable delivery of current to an inductor of a voltage regulator. In an embodiment, a hardware interface of integrated circuit (IC) die accommodates coupling of the IC die to multiple inductors. The hardware interface comprises contacts which are each to couple the IC die to a respective one of the multiple inductors. A phase circuit of the IC die includes multiple cells which are each coupled to a different respective contact of a plurality of contacts of the hardware interface. A digital controller of the IC die is operable to select any of various combinations of the multiple cells each to conduct a respective current with a corresponding one of the plurality of contacts. In another embodiment, the plurality of contacts are arranged as a multi-row, multi-column array.


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