The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2026
Filed:
Jan. 12, 2023
Cadence Design Systems, Inc., San Jose, CA (US);
Ngai Ngai William Hung, San Jose, CA (US);
Platon Beletsky, San Jose, CA (US);
Dongxiang Wu, Palo Alto, CA (US);
Dhiraj Goswami, Wilsonville, OR (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Methods and systems are provided for performing combinational loop emulation. The methods and systems access a circuit design comprising a loop break element in a combinational loop path, where the loop break element comprises an input and an output. The methods and systems detect a change between the input of the loop break element and the output of the loop break element. The methods and systems identify a type of consumer of the output of the loop break element in the combinational loop path. The methods and systems determine whether to apply an extra clock cycle to the loop break element based on the type of consumer of the output of the loop break element and the detected change between the input and the output of the loop break element.