The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

May. 05, 2022
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Rohith Kamath, Bangalore, IN;

Amit Vijayvargiya, Bangalore, IN;

Shankara Venkatraman Gopalan, Bangalore, IN;

Shankar Ab, Bengaluru, IN;

Assignee:

SANDISK TECHNOLOGIES, INC., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 23/498 (2006.01); H01L 23/64 (2006.01);
U.S. Cl.
CPC ...
H01L 25/162 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 23/642 (2013.01); H01L 25/165 (2013.01); H01L 23/49838 (2013.01);
Abstract

A semiconductor device package includes a first substrate extending along a first central plane, and a second substrate electrically connected to the first substrate and extending along a second central plane that is substantially parallel with and offset from the first central plane of the first substrate. One or more capacitors are electrically and mechanically connected to the second substrate via one or more leads. All of the one or more capacitors are positioned at the second substrate. All of the capacitors being positioned at the second substrate, reduces the complexity of and time required to manufacture the semiconductor device package.


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