The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Jun. 21, 2024
Applicant:

Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US);

Inventors:

Ron Zhang, Sunnyvale, CA (US);

Gaius Gillman Fountain, Jr., Youngsville, NC (US);

Thomas Workman, San Jose, CA (US);

Belgacem Haba, Saratoga, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/20 (2006.01); H01L 23/473 (2006.01);
U.S. Cl.
CPC ...
H05K 7/20254 (2013.01); H01L 23/473 (2013.01);
Abstract

An integrated cooling assembly comprising a semiconductor device and a cold plate directly bonded to the semiconductor device. The cold plate comprises a top portion, sidewalls and a divider extending downwardly from the top portion to a backside of the semiconductor device, an inlet opening; and an outlet opening. The top portion, the sidewalls, the divider and the backside of the semiconductor device collectively define a first coolant channel and a second coolant channel extending laterally between the inlet opening and the outlet opening. A channel width of the first coolant channel in a direction parallel to the backside of the semiconductor device is greater than a channel width of the second coolant channel in in the same direction; and a portion of the first coolant channel is disposed above a hotspot region of the semiconductor device.


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