The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Feb. 22, 2024
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Sumeet Mali, Dublin, IE;

Kai Dieffenbach, Egelsbach, DE;

Richard Landenbach, Langen, DE;

Uwe Moslehner, Geiselbach, DE;

Thiyagu Loganathan, Baldham, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); B60R 16/023 (2006.01); G05B 23/02 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); B60R 16/0232 (2013.01); G05B 23/0205 (2013.01); G06F 11/0766 (2013.01);
Abstract

Techniques are disclosed for a fault monitor to determine that no fault has been lost. The fault monitor may distinguish between critical and non-critical faults without the risk of missing a critical fault. The fault monitor may detect a new fault event from a fault source and may set a fault overrun flag when the new fault event is detected while an existing fault event from the fault source is being processed. When the fault monitor receives a fault acknowledgement to indicate completion of processing of the existing fault event, the fault monitor may generate a request to process the new fault event as an overrun fault based on the fault overrun flag is set. The fault monitor may generate a request to process the new fault event as a non-overrun fault when the new fault event is detected without an existing fault event from the fault source being processed.


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