Adaptive optimization of error-handling flows in memory devices

Abstract

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including sending, to a device that provides error-handling flow optimization, an ordered set of error-handling operations to be performed to recover data residing in a segment of the memory device; receiving, from the device that provides the error-handling flow optimization, a reordered set of error-handling operations, wherein the reordered set adjusts an order of one or more error-handling operations of the ordered set of error-handling operations, wherein the reordered set is obtained by applying the ordered set of error-handling operations to a trained machine learning model, wherein the trained machine learning model is based on latency data for previously-performed error-handling operations, and wherein the latency data for the previously-performed error-handling operations depends on a workload of the segment of the memory device; and performing one or more error-handling operations of the reordered set of error-handling operations to the data residing in the segment of the memory device.