The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2026
Filed:
Aug. 10, 2023
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01); G06F 30/3953 (2020.01); H01L 23/522 (2006.01); H03K 19/0944 (2006.01); H10D 84/80 (2025.01);
U.S. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01); G06F 30/3953 (2020.01); H01L 23/5226 (2013.01); H03K 19/09441 (2013.01); H10D 84/811 (2025.01);
Abstract
A method of generating an IC layout diagram includes positioning a resistor unit cell in the IC layout diagram, a resistor of the resistor unit cell including a source/drain metal region, positioning a MOS unit cell in the IC layout diagram, overlapping the resistor unit cell with a first via region, overlapping the MOS unit cell with a second via region, overlapping the first and second via regions with a continuous conductive region, and storing the IC layout diagram in a storage device.