Isolation structure for transistors

Abstract

A semiconductor structure according to the present disclosure includes a base fin over a substrate, a stack of nanostructures disposed directly over the base fin, a gate structure wrapping around each of the stack of nanostructures, an isolation feature disposed over the substrate and adjacent the base fin, and a dielectric fin disposed directly on the isolation feature. The dielectric fin includes in a bottom portion, a middle layer over the bottom portion and a top layer over the middle layer. The bottom portion includes an outer layer and an inner layer spaced apart from the gate structure and the isolation feature by the outer layer. The middle layer is in direct contact with top surfaces of the inner layer and the outer layer. The dielectric constant of the top layer of the dielectric fin is greater than the dielectric constant of the middle layer.