The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Mar. 29, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jiyeong Kim, Suwon-si, KR;

Jinyoung Kim, Suwon-si, KR;

Jihye Shim, Suwon-si, KR;

Okseon Yoon, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/49816 (2013.01); H01L 23/49894 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 25/105 (2013.01); H01L 2224/08235 (2013.01); H01L 2224/16235 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/182 (2013.01);
Abstract

A semiconductor package includes a redistribution structure including a wiring structure and an insulating structure covering the wiring structure, the redistribution structure having a first surface and a second surface, which are opposite to each other, the insulating structure including a polymer, a semiconductor chip on the first surface, the semiconductor chip being connected to at least one first wiring pattern in the wiring structure, a passivation insulating film covering the second surface, the passivation insulating film including an inner surface contacting the insulating structure and a hole sidewall defining a hole, the passivation insulating film including an inorganic insulating material, a conductive pad passing through the passivation insulating film via the hole and contacting the second wiring pattern, the conductive pad having a pad sidewall contacting the hole sidewall, and an external connection terminal on the conductive pad.


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