The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Dec. 22, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Carl H. Naylor, Portland, OR (US);

Christopher Jezewski, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76886 (2013.01); H01L 21/76834 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53238 (2013.01); H01L 21/02474 (2013.01); H01L 21/02477 (2013.01); H01L 21/02516 (2013.01);
Abstract

Integrated circuit interconnect structures including an interconnect line metallization feature subjected to one or more chalcogenation techniques to form a cap may reduce line resistance. A top portion of a bulk line material may be advantageously crystallized into a metal chalcogenide cap with exceptionally large crystal structure. Accordingly, chalcogenation of a top portion of a bulk material can lower scattering resistance of an interconnect line relative to alternatives where the bulk material is capped with an alternative material, such as an amorphous dielectric or a fine grained metallic or graphitic material.


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