Energy efficient fast read in a memory device

Abstract

The memory device includes circuitry which is configured to sense threshold voltages of the memory cells of a selected word line of the plurality of word lines in a sensing operation. During the sensing operation, the circuitry, in a first sensing process, senses the memory cells of the selected word line using both a fast read technique and a positive sensing technique. The circuitry also determines a fail bit count and compares the fail bit count to a threshold. In response to the fail bit count being less than or equal to the threshold, the circuitry completes the sensing operation. In response to the fail bit count exceeding the threshold, then the circuitry performs a second sensing process to sense threshold voltages of the memory cells of the selected word line using a relatively slower read technique.