Dynamic random-access memory (dram) device, memory bank of dram device and method thereof

Abstract

A dynamic random-access memory (DRAM) device includes a first physical memory area corresponding to a first memory mat, a second physical memory area corresponding to a second memory mat, bit line pairs, switch pairs and sense amplifiers. The first and second physical memory areas include memory cells of the first memory bank and memory cells of the second memory bank being arranged alternately. The sense amplifiers of the first memory bank are electrically connected to first-bank bit line pairs in the first and second physical memory areas during a first row cycle time period. The sense amplifiers are configured to perform a memory operation to the memory cells connected to the first-bank bit line pairs during the first row cycle time period.