The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Feb. 17, 2023
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Jianquan Zheng, San Jose, CA (US);

Peivand Tehrani, Campbell, CA (US);

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/323 (2020.01); G06F 30/3312 (2020.01); G06F 30/3315 (2020.01); G06F 30/367 (2020.01); G06F 30/373 (2020.01); G06F 30/398 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 30/323 (2020.01); G06F 30/3315 (2020.01); G06F 30/367 (2020.01); G06F 30/373 (2020.01); G06F 30/398 (2020.01); G06F 2119/12 (2020.01);
Abstract

The present disclosure describes systems and methods for scaling timing libraries for circuit design analysis. The method includes applying a first transformation to timing library data for an electric component design to produce first transformed timing library data and applying a second transformation to the timing library data to produce second transformed timing library data. The method also includes, in response to determining that the first transformed timing library data is more linear than the second transformed timing library data: estimating, by a processor, transformed timing data for the electric component design based on the first transformed timing library data and applying an inverse of the first transformation to the estimated transformed timing data to produce estimated timing data for the electric component design.


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