The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Mar. 18, 2024
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Bernhard Sell, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/62 (2025.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H10B 12/00 (2023.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/00 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 62/17 (2025.01); H10D 62/822 (2025.01); H10D 62/83 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01); H10D 64/68 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10D 84/85 (2025.01); H10D 86/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6212 (2025.01); H01L 21/02532 (2013.01); H01L 21/30604 (2013.01); H01L 21/3083 (2013.01); H10B 12/056 (2023.02); H10B 12/36 (2023.02); H10D 30/024 (2025.01); H10D 30/0243 (2025.01); H10D 30/0245 (2025.01); H10D 30/0323 (2025.01); H10D 30/62 (2025.01); H10D 30/6211 (2025.01); H10D 30/6213 (2025.01); H10D 30/6217 (2025.01); H10D 30/6219 (2025.01); H10D 30/67 (2025.01); H10D 62/021 (2025.01); H10D 62/117 (2025.01); H10D 62/151 (2025.01); H10D 62/292 (2025.01); H10D 62/822 (2025.01); H10D 62/83 (2025.01); H10D 64/017 (2025.01); H10D 64/021 (2025.01); H10D 64/667 (2025.01); H10D 64/685 (2025.01); H10D 64/693 (2025.01); H10D 84/0128 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01); H10D 84/853 (2025.01); H10D 86/215 (2025.01); H01L 2924/13067 (2013.01);
Abstract

Semiconductor devices having necked semiconductor bodies and methods of forming semiconductor bodies of varying width are described. For example, a semiconductor device includes a semiconductor body disposed above a substrate. A gate electrode stack is disposed over a portion of the semiconductor body to define a channel region in the semiconductor body under the gate electrode stack. Source and drain regions are defined in the semiconductor body on either side of the gate electrode stack. Sidewall spacers are disposed adjacent to the gate electrode stack and over only a portion of the source and drain regions. The portion of the source and drain regions under the sidewall spacers has a height and a width greater than a height and a width of the channel region of the semiconductor body.


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