The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Nov. 07, 2022
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Jin Peng, Wuhan, CN;

Ziqun Hua, Wuhan, CN;

Zuhui Zheng, Wuhan, CN;

Zheng Xiang, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7682 (2013.01); H01L 21/76805 (2013.01); H01L 21/76895 (2013.01); H01L 23/5329 (2013.01); H01L 23/535 (2013.01);
Abstract

A semiconductor structure manufacturing method includes forming a base having a substrate and a dielectric layer on the substrate; forming a first metal layer on the base, the first metal layer has a plurality of first metal lines spaced apart from each other and partially covers the base; forming a dielectric landing layer to cover top surfaces and sidewalls of the plurality of first metal lines; forming a hollow dielectric layer on the dielectric landing layer between adjacent first metal lines; forming an interlayer dielectric layer to cover top surfaces of the hollow dielectric layer and the dielectric landing layer; etching the interlayer dielectric layer and the dielectric landing layer to form a plurality of trenches that expose the plurality of first metal lines; and depositing a metal material in the plurality of trenches to form a second metal layer.


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