The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

May. 31, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Sanjeev Kumar Jain, Ottawa, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4074 (2006.01); G11C 11/4093 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G11C 11/4093 (2013.01); G11C 11/4094 (2013.01);
Abstract

Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit may include a first memory cell, a first buffer, first logic circuitry, and first switching circuitry. The first memory cell may be configured to pre-charge in response to receiving a primary sleep signal. The first buffer may be configured to receive the primary sleep signal, generate a delayed primary sleep signal, and provide the delayed primary sleep signal to a second memory cell. The first logic circuitry may be configured to generate a first bit line pre-charge signal for the first memory cell of the plurality of memory cells in response to a looped sleep signal, wherein the looped sleep signal is generated based on the delayed primary sleep signal. The first switching circuitry may be configured to provide power to one or more bit line of the first memory cell in response to the first bit line pre-charge signal.


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