The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2026
Filed:
Dec. 05, 2022
Synopsys, Inc., Mountain View, CA (US);
Peivand Tehrani, Campbell, CA (US);
Paul Berevoescu, Sunnyvale, CA (US);
Shaun Koruthu Peter, San Jose, CA (US);
Synopsys, Inc., Sunnyvale, CA (US);
Abstract
A computer-implemented method for performing static noise analysis in an electronic design of an integrated circuit includes accessing, by a processing device, the electronic design including a plurality of voltage domains, wherein each voltage domain includes one or more functional elements and one or more domain voltages. The method further includes performing a timing analysis of the electronic design and determining respective signal arrival timing windows for the one or more functional elements in the electronic design. The method further includes generating a noise waveform at a first functional element based on the signal arrival timing windows and slews of aggressor nets of a first functional element in a first voltage domain of the plurality of voltage domains. The method further includes determining a number of noise waveforms reaching a second functional element in a second voltage domain based on the plurality of voltage domains and the one or more domain voltages in the plurality of voltage domains, and propagating at least one noise waveform of the number of noise waveforms to the second functional element.