The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Dec. 23, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Siddhartha Chhabra, Portland, OR (US);

Prashant Dewan, Portland, OR (US);

Baiju Patel, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/14 (2006.01); G06F 13/28 (2006.01); G06F 15/78 (2006.01); G06F 21/60 (2013.01); G06F 21/62 (2013.01); G06F 21/79 (2013.01); G06F 21/10 (2013.01);
U.S. Cl.
CPC ...
G06F 21/602 (2013.01); G06F 12/0238 (2013.01); G06F 12/1408 (2013.01); G06F 13/28 (2013.01); G06F 15/7807 (2013.01); G06F 21/6209 (2013.01); G06F 21/79 (2013.01); G06F 21/107 (2023.08); G06F 2212/1052 (2013.01); G06F 2212/222 (2013.01);
Abstract

Methods and apparatus relating to a Converged Cryptographic Engine (CCE) for storage encryption are described. In an embodiment, decode circuitry decodes an instruction to determine whether Converged Cryptographic Engine (CCE) circuitry is enabled. Execution circuitry executes the instruction to program a plurality of keys in response to the CCE circuitry being enabled. The CCE circuitry performs all encryption and all decryption of data to be transferred between a memory and a storage device based at least in part on at least one of the plurality of keys. Other embodiments are also disclosed and claimed.


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