The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Dec. 01, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sangho Rha, Seongnam-si, KR;

Iksoo Kim, Yongin-si, KR;

Jiwoon Im, Hwaseong-si, KR;

Byungsun Park, Suwon-si, KR;

Seonkyu Shin, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/27 (2023.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); H10B 43/27 (2023.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); G11C 5/025 (2013.01); G11C 5/06 (2013.01); H10B 43/27 (2023.02); H10D 64/517 (2025.01);
Abstract

A semiconductor device includes a memory cell structure on a substrate, and a dummy structure on a side of the memory cell structure. The memory cell structure includes a memory stack structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate, channel structures penetrating through the memory stack structure and contacting the substrate, and first separation structures penetrating through the memory stack structure and extending in the first direction to separate the gate electrodes from each other in a second direction. The dummy structure includes dummy stack structures spaced apart from the memory stack structure and including first insulating layers and dummy gate electrodes alternately stacked, dummy channel structures penetrating through the dummy stack structures, and second separation structures penetrating through the dummy stack structures and extending in the second direction to separate the dummy gate electrodes from each other in the first direction.


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