The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Dec. 24, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ganesh Venkatesan, Hillsboro, OR (US);

Elad Oren, Tel Aviv, IL;

Susruth Sudhakaran, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 56/00 (2009.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04W 56/0035 (2013.01); H04L 7/0012 (2013.01); H04L 7/0016 (2013.01); H04W 56/003 (2013.01);
Abstract

Logic to receive a first set of two or more timing management frames wherein one or more of the two or more timing management frames in the first set comprise a first adjusted follower clock value. Logic to calculate a second adjusted clock value. Logic to cause transmission of a second set of two or more timing management frames, wherein one or more of the two or more timing management frames in the second set comprise the second adjusted clock value. Logic to cause transmission of a first set of two or more acknowledgement frames. Logic to receive a second set of two or more acknowledgement frames. And logic to calculate a difference between the first adjusted follower clock value and the second adjusted clock value to determine a synchronization error, the synchronization error to represent a performance of the time synchronization.


Find Patent Forward Citations

Loading…