The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Mar. 26, 2024
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:
Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/315 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 24/16 (2013.01); H01L 25/10 (2013.01); H01L 25/50 (2013.01); H01L 2224/16145 (2013.01);
Abstract

In examples, a semiconductor package comprises a wafer chip scale package (WCSP) having circuitry formed in a device side and an insulative layer above the device side. The WCSP includes one or more plated walls extending vertically to form a defined space, the one or more plated walls configured to prevent mold compound from flowing into the defined space. The WCSP includes mold compound abutting surfaces of the one or more plated walls opposing the defined space. The WCSP includes a conductive terminal coupled to the circuitry and extending from the WCSP into the defined space.


Find Patent Forward Citations

Molina, John Carlo Cruz. (2025). Plated walls defining mold compound cavities (U.S. Patent No. 12512381). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12512381

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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