The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2025
Filed:
Jun. 28, 2021
Applicant:
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Inventors:
Rahul Agarwal, Santa Clara, CA (US);
Dean Gonzales, Fort Collins, CO (US);
Assignee:
ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 22/30 (2013.01); H01L 21/4857 (2013.01); H01L 23/49822 (2013.01);
Abstract
A chip for wafer-level testing of fanout chiplet, including: a die; a carrier substrate; a plurality of redistribution layers applied to the carrier substrate; and one or more first conductive pathways in the plurality of redistribution layers, wherein the one or more first conductive pathways each comprise a first end coupled to a corresponding input/output connection point of the die and a second end coupled to a corresponding probing site, wherein the one or more first conductive pathways are not routed through the carrier substrate.