The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Aug. 22, 2023
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventor:

Byung-Jin Choi, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/67 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67144 (2013.01); H01L 24/80 (2013.01); H01L 24/97 (2013.01); H01L 21/6838 (2013.01); H01L 24/05 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/8001 (2013.01); H01L 2224/80379 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/97 (2013.01); H01L 2924/05442 (2013.01);
Abstract

A method for bonding chips includes receiving chip placement information including positions on one or more product substrates where chips are to be bonded, generating instructions for a chip placement device to place a plurality of chips from one or more chip sources onto one or more intermediate substrates based on the received chip placement information, receiving the one or more intermediate substrates having the plurality of chips placed thereon according to the generated instructions, and actuating a plurality of bonding heads to collectively bond a subset of chips of the plurality chips of the one or more intermediate substrates to a product substrate of the one or more product substrates. A number of chips of the subset of chips is equal to a number of bonding heads of the plurality of the heads.


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