The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2025
Filed:
Sep. 15, 2023
Applicant:
Wayne State University, Detroit, MI (US);
Inventors:
Leela Mohana Reddy Arava, Troy, MI (US);
Nirul Masurkar, Detroit, MI (US);
Assignee:
Wayne State University, Detroit, MI (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); G01N 27/414 (2006.01); H10D 30/67 (2025.01);
U.S. Cl.
CPC ...
H10D 64/01 (2025.01); G01N 27/4143 (2013.01); G01N 27/4145 (2013.01); G01N 27/4146 (2013.01); H10D 30/6729 (2025.01);
Abstract
A electronic device and a fabrication method is provided. The electronic device having a first electrode and a second electrode. A nano-gap is formed between first and second electrode. The first electrode, the second electrode and the gap may be located in the same layer of the device. A two-dimensional layer of graphene may cover the gap.
Quick Actions:
Reddy Arava, Leela. (2025). Method for fabricating wafer scale/nano submicron gap electrodes and arrays via photolithography (U.S. Patent No. 12507454). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12507454
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile