The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

May. 08, 2024
Applicant:

Efinix, Inc., Cupertino, CA (US);

Inventors:

Kok Yoong Foo, Butterworth, MY;

Jia Chi Koe, Bukit Mertajam, MY;

Assignee:

EFINIX, INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7878 (2013.01); G06F 15/7889 (2013.01);
Abstract

The present invention relates to a configurable logic system () programmed to model a logic design for data pipeline between master and slave; and the method of implementation, wherein said system () comprises of at least one first register () configured to store and transfer at least one data from said master to said slave; wherein said system () is configured to operate on one clock and one reset. The system () further comprises of at least one first control logic () that controls said first register () and fourth register () to provide hold to the ready signal from the slave to ease timing closure at high speed.


Find Patent Forward Citations

Foo, Kok. (2025). Configurable logic system and method for pipelined data transfer (U.S. Patent No. 12505067). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12505067

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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