The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

May. 08, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ching-Hung Wang, Hsinchu, TW;

Yeong-Jyh Lin, Caotun Township, TW;

Ching I Li, Tainan, TW;

Tzu-Wei Yu, Hsinchu, TW;

Chung-Yi Yu, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/68 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 21/681 (2013.01); H01L 24/98 (2013.01); H01L 2224/83136 (2013.01); H01L 2224/8393 (2013.01);
Abstract

Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes performing a bonding process to bond a first semiconductor substrate to a second semiconductor substrate. A shift measurement process is performed on the first and second semiconductor substrates. The shift measurement process includes moving a plurality of substrate pins from a plurality of initial positions to a plurality of measurement positions. The plurality of substrate pins are disposed outside of perimeters of the first and second semiconductor substrates. A shift value is determined between the first semiconductor substrate and the second semiconductor substrate based at least in part on a difference between the plurality of initial positions and the plurality of measurement positions.


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