The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Sep. 26, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sehoon Jang, Hwaseong-si, KR;

Sangkyu Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/295 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/56 (2013.01); H01L 23/293 (2013.01); H01L 24/73 (2013.01); H01L 24/92 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/92125 (2013.01);
Abstract

A method of manufacture for a semiconductor package includes; forming a first wiring structure, connecting a semiconductor chip to the first wiring structure, forming a lower encapsulant on the first wiring structure to cover at least a portion of a lateral surface of the semiconductor chip, wherein the lower encapsulant does not cover an upper surface of the semiconductor chip, forming an upper encapsulant on the lower encapsulant, wherein the upper encapsulant covers the upper surface of the semiconductor chip and the upper encapsulant has a materially different composition than the lower encapsulant, and forming a second wiring structure on the upper encapsulant.


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