The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Dec. 29, 2022
Infineon Technologies Ag, Neubiberg, DE;
Hans-Joachim Schulze, Taufkirchen, DE;
Florian Markus Grasse, St. Stefan im Gailtal, AT;
Moriz Jelinek, Villach, AT;
Axel König, Villach, AT;
Gregor Langer, Wölfnitz, AT;
Bernhard Leitl, Klagenfurt, AT;
Kristijan Luka Mletschnig, Klagenfurt, AT;
Werner Schustereder, Villach, AT;
INFINEON TECHNOLOGIES AG, Neubiberg, DE;
Abstract
A method of manufacturing a metal silicide layer comprises performing laser thermal annealing of a surface region of a silicon carbide (SiC) substrate, exposing a surface of a thus obtained silicon layer, depositing a metal layer above the exposed silicon layer, and/or thermally treating a stack of layers, comprising the silicon layer and the metal layer, to form a metal silicide layer. Alternatively and/or additionally, the method may comprise depositing a silicon layer above a SiC substrate, depositing a metal layer, and/or performing laser thermal annealing of the SiC substrate and a stack of layers above the SiC substrate to form a metal silicide layer, wherein the stack of layers comprises the silicon layer and the metal layer. Moreover, a semiconductor device is described, comprising a SiC substrate, a metal silicide layer, and a polycrystalline layer in direct contact with the SiC substrate and the metal silicide layer.