The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Mar. 18, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Bin Zhao, Shanghai, CN;

Jonathan S. Parry, Boise, ID (US);

Deping He, Boise, ID (US);

Xu Zhang, Shanghai, CN;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01);
Abstract

Methods, systems, and devices for memory write performance techniques are described. A memory system may receive a sequence of commands, for example from a host system. Based on a relationship between logical block addresses of the sequence of commands, the memory system may delay performing a memory management operation (e.g., a garbage collection procedure, a power operation, a cache synchronization operation, a data relocation operation, or the like) for a duration. For example, the memory system may determine whether a quantity of write commands in the sequence that include non-consecutive logical block addresses exceeds a threshold. In some cases, the memory system may perform one or more commands in the sequence during the duration. Subsequently (e.g., at the end of the duration), the memory system may perform the memory management operation.


Find Patent Forward Citations

Loading…