The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

May. 06, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Yi-Chen Lo, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 64/021 (2025.01); H10D 30/031 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0147 (2025.01); H10D 84/038 (2025.01);
Abstract

The present disclosure describes a semiconductor device having a protection layer on inner spacer structures. The semiconductor device includes a nanostructure on a substrate. The nanostructure includes multiple semiconductor layers. The semiconductor device further includes a gate structure wrapped around a middle portion of the multiple semiconductor layers and a spacer structure adjacent to an end portion of the multiple semiconductor layers. The gate structure includes a high-k dielectric layer. The semiconductor device further includes a protection layer between the high-k dielectric layer and the spacer structure.


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