The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

Jul. 12, 2023
Applicants:

Tsinghua University, Beijing, CN;

Hon Hai Precision Industry Co., Ltd., New Taipei, TW;

Inventors:

Guang-Qi Zhang, Beijing, CN;

Yang Wei, Beijing, CN;

Shou-Shan Fan, Beijing, CN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 48/36 (2025.01); H03K 19/08 (2006.01); H10D 48/32 (2025.01); H10D 62/80 (2025.01);
U.S. Cl.
CPC ...
H10D 48/366 (2025.01); H03K 19/08 (2013.01); H10D 48/362 (2025.01); H10D 62/80 (2025.01);
Abstract

The present application provides a logic gate device. The logic gate device includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form an air gap, and the air gap is distributed at both sides of the bottom electrode. The gate electrode is configured to connect a gate voltage, and the first top electrode and the second top electrode are configured to connect a signal input terminal.


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