Memory circuitry and method used in forming memory circuitry

Abstract

Memory circuitry comprising strings of memory cells comprises a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel material strings extend through the insulative tiers and the conductive tiers in a memory-array region. The insulative tiers and the conductive tiers extend from the memory-array region into a stair-step region. The stair step region comprises a cavity comprising a flight of stairs having insulative material atop stair treads. Individual of the treads comprise conducting material of a conductive tier. Conductive vias extend through the insulative material and are directly above and against the conducting material of the respective individual tread. A lining is over sidewalls and bottom of the individual conductive vias. The individual conductive vias are directly under the bottom of the lining directly above the conducting material of the respective individual tread. Other embodiments, including methods of forming the circuitry and elements of circuitry above, are disclosed.