The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2025
Filed:
Jun. 02, 2023
Intel Corporation, Santa Clara, CA (US);
Shailendra Singh Chauhan, Bangalore, IN;
Venkata Mahesh Gunnam, Yeditha, IN;
Venkataramana Kotakonda, Bangalore, IN;
Chuen Ming Tan, Bayan Lepas, MY;
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments herein relate to avoiding damage to a transistor in a power-sinking device that receives power from an external power source via a Universal Serial Bus port. In one aspect, a controller of the device sets a current limit to a reduced level during a wait period after the external power source is connected to the power-sinking device. The wait period avoids damage to the transistor by allowing its input and output voltages to equalize before the current is increased. Upon expiration of the wait period, the current limit is increased to a level negotiated with the external power source. Other aspects involve considering a sleep or low/dead battery state of the power-sinking device. The current limit can be set by programming a current limit of a battery charger coupled to between the transistor and a power bus of the device.