The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

Jul. 20, 2023
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Alaa Eldin Y El Sherif, Plano, TX (US);

Jean-Philippe Meunier, Ayguesvives, FR;

Loic Hureau, Sainte Marie d'Attez, FR;

Thomas Henry Luedeke, Oberbergkirchen, DE;

Maxime Clairet, Labastidette, FR;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/24 (2006.01); G06F 1/28 (2006.01);
U.S. Cl.
CPC ...
G06F 1/24 (2013.01); G06F 1/28 (2013.01);
Abstract

A semiconductor circuit is disclosed, comprising: a processor; a supply-voltage terminal arranged to receive a supply voltage; an out-of-range-voltage-detection circuit, coupled to the supply-voltage terminal and configured to output a voltage-out-of-range indicator in response to detecting that the supply voltage is out-of-range; a PWM signal generator configured to generate a PWM signal; a power-on-reset request terminal arranged to output the PWM signal during a normal operation of the processor; and logic circuitry between the signal generator and the POR request terminal and configured to modify the PWM signal in response receiving the voltage-out-of-range indicator. A microcontroller circuit incorporating such a semiconductor circuit, and a PMIC circuit for use in conjunction, are also disclosed.


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