The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

May. 23, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shih-Hang Chiu, Taichung, TW;

Wei-Cheng Wang, Hsinchu, TW;

Kuan-Ting Liu, Hsinchu, TW;

Chi On Chui, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/285 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01);
U.S. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/28568 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 64/017 (2025.01);
Abstract

A method according to the present disclosure includes providing a substrate that includes a dummy gate stack wrapping over an active region, and a spacer layer extending along sidewalls of the dummy gate stack, selectively removing the dummy gate stack to form a gate trench exposing the active region, depositing a gate dielectric over the active region, depositing at least one work function layer over the gate dielectric layer, depositing a tungsten layer over the at least one work function layer, and depositing a tungsten nitride layer over the tungsten layer.


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