Receiver circuit, corresponding isolated driver device, electronic system and method of decoding a differential signal into a digital output signal

Abstract

Provided is a receiver circuit that receives a differential signal including positive and negative spikes. A first comparator produces an intermediate set signal that includes a pulse at each positive spike of the differential signal, and a second comparator produces an intermediate reset signal that includes a pulse at each negative spike of the differential signal. A sensing circuit extracts a common-mode voltage signal from the differential signal and asserts a control signal when the amplitude of the common-mode voltage signal exceeds a threshold. A logic circuit asserts a masking signal for an interval in response to asserting the control signal and de-asserts the masking signal in response to the interval elapsing. The logic circuit produces a corrected set signal. The logic circuit produces a corrected reset signal. An output circuit generates an output signal from the corrected set signal and the corrected reset signal.