The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

Jan. 05, 2023
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Marc L. Tarabbia, Austin, TX (US);

Scott P. Warrick, Austin, TX (US);

Winston S. Blackley, Austin, TX (US);

Assignee:

CIRRUS LOGIC, INC., Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/322 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/56 (2006.01); H01L 21/70 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H10D 1/47 (2025.01); H10D 86/85 (2025.01);
U.S. Cl.
CPC ...
H01L 21/3221 (2013.01); H01L 21/02172 (2013.01); H01L 21/02337 (2013.01); H01L 21/31144 (2013.01); H01L 21/56 (2013.01); H01L 21/707 (2013.01); H01L 23/3107 (2013.01); H01L 23/5226 (2013.01); H10D 1/474 (2025.01); H10D 86/85 (2025.01);
Abstract

An integrated circuit (IC) substrate manufacturing process provides time-dependent device characteristic variation due to hydrogen absorption by including one or more gettering layers near the devices that would otherwise absorb hydrogen and exhibit the variation as the hydrogen migrates in the devices. The method includes forming or mounting the devices on a top surface of the semiconductor wafer in die areas of the substrate, forming semiconductor structures in the semiconductor die areas, forming a getter layer above or adjacent to the devices in the die areas, and processing the wafer with one or more processes exposing the wafer to vapor having a hydrogen content, whereby an amount of hydrogen absorbed by the devices is reduced by presence of the getter layer. The method produces wafers including semiconductor dies with reduced hydrogen absorption by the devices and packaged ICs including the dies.


Find Patent Forward Citations

Loading…